1. Field of Invention
The present invention relates to a semiconductor structure and a manufacturing method thereof.
2. Description of Related Art
A conventional semiconductor structure may include a chip, landing pads, a dielectric layer (e.g., SiO2) and a redistribution layer (RDL). In general, when the semiconductor structure is manufactured, the dielectric layer is used to cover a wafer which is not cut yet to form plural chips for protecting the electronic elements on the wafer. The electronic elements may be image sensors.
Thereafter, a patterned photoresist layer may be formed on the surface of the wafer facing away from the dielectric layer, in such a way that the surface of the wafer above the landing pads that is in the dielectric layer is not covered by the photoresist layer. As a result, the wafer and the dielectric layer that are above the landing pads may be removed by an etching process, such that vertical channels are formed in the wafer and the dielectric layer, and the landing pads may be exposed through the channels. Subsequently, the redistribution layer may be formed on sidewalls of the wafer and the dielectric layer surrounding the channels and the landing pads, such that the redistribution layer can be in electrical contact with the landing pads.
However, the surface of the wafer facing away from the dielectric layer is substantially perpendicular to the sidewalls of the wafer surrounding the channels, and the sidewalls of the dielectric layer surrounding the channels are perpendicular to the landing pads. As a result, the redistribution layer is apt to be broken at connection positions between the surface of the wafer facing away from the dielectric layer and the sidewalls of the wafer surrounding the channels, and connection positions between the sidewalls of the dielectric layer surrounding the channels and the landing pads.